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An analytical accumulation mode SOI pMOSFET model for high-temperature analog applications
Репозиторій DSpace/Manakin
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- Фізико-технічні та математичні науки
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- Відділення фізики і астрономії
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- Semiconductor Physics Quantum Electronics & Optoelectronics
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- Semiconductor Physics Quantum Electronics & Optoelectronics, 2006, том 9
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- Semicond. Physics Quantum Electronics & Optoelectronics, 2006, № 1
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An analytical accumulation mode SOI pMOSFET model for high-temperature analog applications
Інший ID:
PACS 85.30.Tv, 85.30.De
Посилання:
An analytical accumulation mode SOI pMOSFET model for high-temperature analog applications / Yu. Houk, B. Iniguez, D. Flandre, A. Nazarov // Semiconductor Physics Quantum Electronics & Optoelectronics. — 2006. — Т. 9, № 1. — С. 43-54. — Бібліогр.: 15 назв. — англ.
Підтримка:
The work was performed in the frame of SPRING
project (project #IST-1999-12342), and also was
partially supported by NATO CLG (PST CLG 979999).
The authors are thankful to T.E. Rudenko, V. Kilchytska
and A. Tuor for helpful discussions.
Дата:
2006
Переглядів:
661
Завантажень:
330
Анотація:
An accumulation mode SOI pMOSFET model for simulation of analog circuits meant for high-temperature applications is presented in the paper. The model is based on explicit expressions for the drain current with an infinite order of continuity what assures smooth transitions between different operation regimes of the transistor. This model is valid for all regimes of normal operation, demonstrates proper description of high-temperature behavior of the subthreshold and off-state current. The model characteristics show a good agreement with the experimental data for temperatures up to 300 °C.
